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d a t a sh eet product speci?cation supersedes data of 1998 jul 29 file under integrated circuits, ic24 2002 mar 29 integrated circuits 74LVC257A quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state
2002 mar 29 2 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A features 5 v tolerant inputs for interfacing with 5 v logic wide supply voltage range of 1.2 to 3.6 v cmos low power consumption direct interface with ttl levels inputs accept voltages up to 5.5 v complies with jedec standard no. 8-1a specified from - 40 to +85 and +125 c. description the 74LVC257A is a high-performance, low-power, low-voltage, si-gate cmos device and superior to most advanced cmos compatible ttl families. inputs can be driven from either 3.3 v or 5 v devices. this feature allows the use of these devices as translators in a mixed 3.3 v/5 v environment. the 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common select input (s). the data inputs from source 0 (1i 0 to 4i 0 ) are selected when input s is low and the data inputs from source 1 (1i 1 to 4i 1 ) are selected when input s is high. data appears at the outputs (1y to 4y) in true (non-inverting) form from the selected inputs. the 74lvc157a is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to s. the outputs are forced to a high impedance off-state when oe is high. quick reference data gnd = 0 v; t amb =25 c; t r =t f 2.5 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i + s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; a) c l = output load capacitance in pf; v cc = supply voltage in v; s (c l v cc 2 f o ) = sum of the outputs. 2. the condition is v i = gnd to v cc . ordering information symbol parameter conditions typical unit t phl /t plh propagation delay ni 0 ,ni 1 to ny c l = 50 pf; v cc = 3.3 v 2.6 ns stony c l = 50 pf; v cc = 3.3 v 2.9 ns c i input capacitance 5.0 pf c pd power dissipation capacitance per gate v cc = 3.3 v; notes 1 and 2 17 pf type number package temperature range pins package material code 74LVC257Ad - 40 to +125 c 16 so plastic sot109-1 74LVC257Adb 16 ssop plastic sot338-1 74LVC257Apw 16 tssop plastic sot403-1 74LVC257Abq 16 hvqfn16 plastic sot763-1
2002 mar 29 3 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A function table see note 1. note 1. h = high voltage level; l = low voltage level; x = dont care: z = high impedance off-state. inputs outputs oe s ni 0 ni 1 ny hxxxz lhxll lhxhh lllxl l lhxh pinning for so, ssop and tssop pinning for hvqfn16 pin symbol description 1 s common data select input 2, 5, 11, 14 1i 0 to 4i 0 data inputs from sources 0 3, 6, 10, 13 1i 1 to 4i 1 data inputs from sources 1 4, 7, 9, 12 1y to 4y 3-state multiplexer outputs 8 gnd ground (0 v) 15 oe 3-state output enable input (active low) 16 v cc dc supply voltage pin symbol description 16 s common data select input 1, 4, 10, 13 1i 0 to 4i 0 data inputs from sources 0 2, 5, 9, 12 1i 1 to 4i 1 data inputs from sources 1 3, 6, 8, 11 1y to 4y 3-state multiplexer outputs 7 gnd ground (0 v) 14 oe 3-state output enable input (active low) 15 v cc dc supply voltage
2002 mar 29 4 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A handbook, halfpage 257 mna536 1 2 3 4 5 6 7 8 s 1i 0 1i 1 1y 2i 0 2i 1 2y gnd v cc oe 4i 0 4i 1 4y 3i 0 3i 1 3y 16 15 14 13 12 11 10 9 fig.1 pin configuration so, ssop and tssop. 1 2 3 6 4 7 5 8 9 10 oe 1i 0 2i 1 1i 1 2y 1y 3y 3i 0 4i 1 2i 0 3i 1 4y 4i 0 gnd s v cc 16 13 15 12 14 11 257 fig.2 pin configuration hvqfn16. handbook, halfpage mna537 1i 0 1i 1 2i 0 2i 1 3i 0 3i 1 4i 0 4i 1 s 1y 2y 3y 4y 1 15 12 9 7 4 13 14 10 11 6 5 3 2 oe fig.3 logic symbol. mna538 handbook, halfpage 12 9 7 15 1 g1 en mux 1 1 4 13 14 10 11 6 5 3 2 fig.4 logic symbol (ieee/iec).
2002 mar 29 5 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A handbook, halfpage mna540 3-state multiplexer outputs selector 2y 3y 4y 12 9 7 2i 0 2i 1 3i 0 3i 1 4i 0 4i 1 s oe 13 15 1 14 10 11 6 5 1y 4 1i 0 1i 1 3 2 fig.5 functional diagram. handbook, full pagewidth mna539 2y 3y 4y 2i 0 2i 1 3i 0 3i 1 4i 0 4i 1 s oe 1y 1i 0 1i 1 fig.6 logic diagram.
2002 mar 29 6 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (groun d=0v). note 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. symbol parameter conditions limits unit min. max. v cc dc supply voltage (for max. speed performance) 2.7 3.6 v dc supply voltage (for low-voltage applications) 1.2 3.6 v v i dc input voltage range 0 5.5 v v o dc output voltage range output high or low state 0 v cc v output 3-state 0 5.5 v t amb operating ambient temperature range - 40 +125 c t r ,t f input rise and fall times v cc = 1.2 to 2.7 v 0 20 ns/v v cc = 2.7 to 3.6 v 0 10 symbol parameter conditions min. max. unit v cc dc supply voltage - 0.5 +6.5 v i ik dc input diode current v i <0 -- 50 ma v i dc input voltage note 1 - 0.5 +6.5 v i ok dc output diode current v o >v cc or v o <0 - 50 ma v o dc output voltage output high or low state note 1 - 0.5 v cc + 0.5 v v o dc output voltage output 3-state note 1 - 0.5 + 6.5 v i o dc output source or sink current v o = 0 to v cc - 50 ma i gnd , i cc dc v cc or gnd current - 100 ma t stg storage temperature range - 65 +150 c p tot power dissipation per package plastic mini-pack (so) above +70 c derate linearly with 8 mw/k - 500 mw plastic shrink mini-pack (ssop and tssop) above +60 c derate linearly with 5.5 mw/k - 500 mw plastic quad flat pack no lead (hvqfn16) above +60 c derate linearly with 4.5 mw/k - 500 mw
2002 mar 29 7 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A dc characteristics over recommended operating conditions; voltage are referenced to gnd (groun d=0v). notes 1. all typical values are at v cc = 3.3 v and t amb =25 c. 2. for i/o ports the parameter i oz includes the input leakage current. symbol parameter test conditions t amb ( c) t amb ( c) unit other v cc (v) - 40 to +85 - 40 to +125 min. typ. (1) max. min. max. v ih high-level input voltage 1.2 v cc -- v cc - v 2.7 to 3.6 2.0 -- 2.0 - v v il low-level input voltage 1.2 -- gnd - gnd v 2.7 to 3.6 -- 0.8 - 0.8 v v oh high-level output voltage; v i =v ih or v il i o = - 100 m a 2.7 to 3.6 v cc - 0.2 v cc - v cc - 0.3 - v i o = - 12 ma 2.7 v cc - 0.5 -- v cc - 0.65 - v i o = - 18 ma 3.0 v cc - 0.6 -- v cc - 0.75 - v i o = - 24 ma 3.0 v cc - 0.8 -- v cc - 1 - v v ol low-level output voltage; v i =v ih or v il i o = 100 m a 2.7 to 3.6 - gnd 0.2 - 0.3 v i o =12ma 2.7 -- 0.4 - 0.6 v i o =24ma 3.0 -- 0.55 - 0.8 v i i input leakage current v i = 5.5 v or gnd 3.6 - 0.1 5 - 20 m a i oz 3-state output off-state current v i =v ih or v il ; v o = 5.5 v or gnd note 2 3.6 - 0.1 5 - 20 m a i off power off leakage supply v i or v o = 5.5 v 0.0 - 0.1 10 - 20 m a i cc quiescent supply current v i =v cc or gnd; i o =0 3.6 - 0.1 10 - 40 m a d i cc additional quiescent supply current per input pin v i =v cc - 0.6v i o =0 2.7 to 3.6 - 5 500 - 5000 m a
2002 mar 29 8 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A ac characteristics gnd = 0 v; t r =t f 2.5 ns. notes 1. typical values at v cc = 3.3 v. 2. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. symbol parameter waveforms t amb ( c) unit - 40 to +85 - 40 to +125 min. typ. (1) max. min. max. v cc = 1.2 v t phl /t plh propagation delay ni 0 to ny, ni 1 to ny see figs 6 and 8 - 13 --- ns t phl /t plh propagation delay s to ny see figs 6 and 8 - 15 --- ns t pzh /t pzl 3-state output enable time oe to ny see figs 7 and 8 - 18 --- ns t phz /t plz 3-state output disable time oe to ny see figs 7 and 8 - 10 --- ns v cc = 2.7 v t phl /t plh propagation delay ni 0 to ny, ni 1 to ny see figs 6 and 8 1.5 3.0 5.4 1.5 7.0 ns t phl /t plh propagation delay s to ny see figs 6 and 8 1.5 3.4 7.5 1.5 9.5 ns t pzh /t pzl 3-state output enable time oe to ny see figs 7 and 8 1.5 4.1 6.7 1.5 8.5 ns t phz /t plz 3-state output disable time oe to ny see figs 7 and 8 1.5 3.1 4.7 1.5 6.0 ns v cc = 3.0 to 3.6 v t phl /t plh propagation delay ni 0 to ny, ni 1 to ny see figs 6 and 8 1.0 2.6 4.6 1.0 6.0 ns t phl /t plh propagation delay s to ny see figs 6 and 8 1.0 2.9 6.4 1.0 8.0 ns t pzh /t pzl 3-state output enable time oe to ny see figs 7 and 8 1.0 3.3 5.6 1.0 7.0 ns t phz /t plz 3-state output disable time oe to ny see figs 7 and 8 1.0 2.8 4.3 1.0 5.5 ns t sk(0) skew note 2 1.0 1.5 ns
2002 mar 29 9 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A ac waveforms handbook, halfpage mna486 t phl t plh v m v m ni 0 , ni 1 , s input ny output gnd v i v oh v ol fig.6 data inputs (ni 0 , ni 1 ) and common data select input (s) to output (ny) propagation delays. v m (1) = 1.5 v at v cc 3 2.7 v; v m (1) = 0.5 v cc at v cc < 2.7 v; v ol and v oh are typical output voltage drop that occur with the output load. handbook, full pagewidth mna450 t plz t phz outputs disabled outputs enabled v oh - 0.3 v v ol + 0.3 v outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v i v cc v m (1) v ol v oh gnd gnd t pzl t pzh v m (2) v m (2) fig.7 3-state enable and disable times. v m (1) = 1.5 v at v cc 3 2.7 v; v m (1) = 0.5 v cc at v cc < 2.7 v; v ol and v oh are typical output voltage drop that occur with the output load.
2002 mar 29 10 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A handbook, full pagewidth open gnd 50 pf 2 v cc v cc v i v o mna368 d.u.t. c l r t r l 500 w r l 500 w pulse generator s1 fig.8 load circuitry for switching times. v cc v i t plh /t phl 1.2 v v cc open 2.7 v 2.7 v open 3.0 to 3.6 v 2.7 v open definitions for test circuits: r l = load resistor. c l = load capacitance including jig and probe capacitance (see chapter ac characteristics). r t = termination resistance should be equal to the output impedance z o of the pulse generator.
2002 mar 29 11 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A package outlines x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.0 0.4 sot109-1 97-05-22 99-12-27 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.050 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
2002 mar 29 12 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 95-02-04 99-12-27 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2.0
2002 mar 29 13 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1.0 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 95-04-04 99-12-27 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.10 pin 1 index
2002 mar 29 14 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A
2002 mar 29 15 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 220 c for thick/large packages, and below 235 c for small/thin packages. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2002 mar 29 16 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, hbga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2002 mar 29 17 philips semiconductors product speci?cation quad 2-input multiplexer with 5 volt tolerant inputs/outputs; 3-state 74LVC257A data sheet status note 1. please consult the most recently issued data sheet before initiating or completing a design. data sheet status product status definitions (1) objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. speci?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

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